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Introduction to Quartus II Software Design using QSim for Simulation

In this tutorial, we will show you how you capture the schematic design for the automatic door opener circuitusing Altera Quartus II software.

The folder “modelsimase” is for Modelsim ASE (Altera Starter Edition). The folder “modelsimae” is for Modelsim AE (Altera Edition). Modelsim ASE (Altera Starter Edition) does not require a license (It is FREE). Since our lab does not have license for Modesim Altera Edition, at.

The Problem

1. Download Quartus Prime software, and any other software products you want to install, into a temporary directory. Download device support files into the same directory as the Quartus Prime software installation file. Change the file permission for all the setup (.run) files.
2. For Intel Quartus Prime software v10.1 and 11.0, the QSim tool and Waveform Editor must be installed separately by using the FPGA University Program Installer. Beginning with the Intel Quartus Prime software v11.1, the QSim tool and Waveform Editor are bundled with the Intel Quartus Prime software.
3. Altera University Program Software. This is a set of Verilog/VHDL files for the DE1/DE2 boards, as well as an easy-to-use C compiler and debugger interface for Nios II. Download the University Program Installer from here. Be sure to select the version that matches your Quartus II distribution.

We are designing a circuit for an automatic door like those you see at supermarkets. The door should open only when a person is detected walking through or when a person presses a switch (such as the wheelchair button) to have the door open. The door should only operate if it has been unlocked.

• output: f = 1 (Opens Door)
• inputs
  • p = 1 Person Detected
  • h = 1 Switch Holding the Door Open
  • c = 1 Door Closed/Locked
• Want door to open when
  • the door is unlocked and person walking through (c=0 and p=1)
  • the door is unlocked and the switch is set to hold it open (c=0 and h=1)

E: Drive or flash drive

While working in the lab, you will want to work from either the E: drive on the lab machines or for a flash drive.You can copy your directory to your I: drive at the end when you are done, but there are problems working directly on the I: drive in Quartus II. Be sure to copy your files to the I: driveor a flash driveafter you are done,since files on the E: drive will be erased.
Each time you create a new project in Quartus II, create a new project directory so that all of the files for each project are in one place and not mixed up with files from other projects.

Getting Started with Altera Quartus

Launch the Altera Quartus software. You should see a screen such as this:

Creating a New project

Select the File → New Project Wizard; a window like the following will appear.

To select the working directory use the button to browse and select E:CP120intro.
Name the project DoorOpener. (Note that the next field gets filled in automatically.)Select Finish.
Don't uses spaces in file or directory names.

Creating a new Schematic design

Select File → New - A window as seen in the following picture will open.

Select 'Block Diagram/Schematic File' and press OK.

This should open a pane where you will design your circuit. This pane is designated Block1.bdf. Save this graphic design file as DoorOpener in your 'intro' directory. The file will be given the bdf extension; bdf stands for block design file and contains schematics, symbols or block diagrams.

Adding text

1. Select the A below the arrow to the left of your Block Diagram/Schematic File window (also known as the palette).
2. Select a point near the top left in the window with the left mouse key.
3. Type your name and then hit the Enter key.
4. Type your project name and then hit the Enter key.
5. Type the following equation, f = hc' + pc' , and then hit the Enter key.
6. Hit the Esc (escape) key to end text additions.

Adding a Component

1. Click the library icon.The Symbol dialog box will appear. This window lists the available Altera libraries as seenin this image.
2. Expand the /altera/quartus12.1/quartus/libraries folder, expand the primitives folder and then expand the logic folder.
3. In the logic folder, select the and2 component by double clicking on it (or by selecting it with a single click, then selecting OK).
4. Click the pointer at the desired location in the Block Diagram/Schematic Editor window to insert the AND symbol into the design file.

Repeat these steps to enter an OR (or2) gate and a NOT (not) gate.

(If you wanted to add multiple NOT gates, you could select the Repeat-insert mode box.)

In the same manner that you placed a gate onto the palette, add three input pins and one output pin from the Symbol libraries. Input pins can be found under primitives | pin | inputs. Output pins can be found under primitives | pin | outputs.

Name your input and output pins as you name them in your equation. Double click on the pin name to change its name.
Never use spaces in pin names; e.g. 'input 1' is a problem - 'input1' and 'input_1' are ok.

Rearrange your devices in approximately the placement you would like for the logic diagram you are trying to construct. You can move a component by selecting it with your mouse, holding down the left button and moving it to another location on the palette.

Save your design. It is a good idea to save your design often, just in case something bad happens .Save the bdf file with the same name as the project.
Don't use spaces in any file names.

Wiring your circuit

Select the orthogonal node tool. Place your pointer on the output of one of the input pins and hold the left mouse button down. You should see a cross-hairs or + appear at the output.

Drag your pointer to the input of the AND gate. Every time you release the mouse key, the line (wire) ends. If your wire did not reach the AND gate, you can add to the wire by putting your mouse over an end of the wire and again selecting it with your left mouse button and dragging your mouse to another position.
Don't run wires along the edge of a device. This can cause simulation problems.
Don't leave inputs and outputs right next to the chips. Make sure you can actually see some wire between them, otherwise you may have simulation problems.

Note: Make sure you do not make the wire too long. If you drag it too far you will see an x; and this is considered an open connection and your design will not compile.

To delete a wire or a portion of a wire, simply click on it (it should change color to indicate selection) and press the delete key.

If wires are connected to the component as you are moving it, the wires will drag and stay connected to the component. This is referred to as 'rubber banding' and is a feature of all major schematic entry design packages. (You can turn rubberbanding on and off using the rubberbanding tool. )Add the rest of the wires needed to connect the logic diagram.

The window should look something like image below. Save your design.

Printing

We will not print today. But you will need to know how for your project.

To print, go to File | Print. If you want to change what appears on the printout or how it appears, go to File | Page Setup change print settings. Before printing, you can view what the print will look like by selecting File | Print Preview

Choosing a Device

The programmable device which we'll use for our design can be chosen now.

Select Assignments | Device from the pull-down menu.

Select MAX7000S from the 'Family' pull-down list.Select the 'Specific device selected' and then choose EPM7064SLC44-10, which is the device we are using in our lab. Select 'OK.'

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If you get a message like this, don't worry; it's fine.

Circuit Compilation

You will need to compile your design to ensure you do not have any errors in your circuit (e.g. you do not have any open connections, etc.)

Click on Processing | Start Compilation to start compilation.

If you get any error messages, you'll need to fix your circuit before you can simulate it.

Common causes of errors

If you have one of these issues, you need to fix it.

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• Do you have a project (qpf) open, or just a drawing (bdf)?
• Is your project on the I: drive?
• Are your project (qpf) and drawing (bdf) files in differentdirectories?
• Are there any spaces in your directory or file names?

Circuit Simulation

1. 
   To open QSim, File | New | New University Waveform File.
2. Select Edit | Insert | Insert Node or Bus.
3. Select Node Finder.
4. Select List.
5. Select the double right arrow to choose all.
   
6. Select OK.
7. Select OK.
8. If you have multiple inputs, you can select a bunch and group them with one counter.
9. Select your input(s), and pick Overwrite Count Value. Select OK.
   
10. Select File | Save As to give this file a name in your project directory. It will have a VWF extension for Vector Waveform File.
11. In the Main window, select Simulation | Options and then select Quartus II Simulator. Select OK.

    Note: If you haven't chosen a Cyclone device, the Quartus II Simulator option will be greyed out. In that case, assign the device to any Cyclone II device and recompile.

12. In the Main window, select Simulation and then select Run Functional Simulation.
    ( Alternatively, you can you the button on the tool bar.)
13. Now you should see your simulation output with the outputs defined. Note: The file will indicate 'read-only' meaning you can't edit it.
    You can expand the grouping:
14. You can navigate around the timeline, zoom in and out, etc.
    

    This part of the output shows that when the inputs are all zero, the output is also zero.

    
    

    This part of the output shows that when c and h are low, and p is high, the output is high.

    
    

    This part of the output shows that when c and p are low, and h is high, the output is also high.

    You can repeat this process to check all of the eight possible input combinations.

    
    
15. Now if you want, you can go back to the simulation settings and choose Timing instead of Functional to see the effects of propagation delay. In the Main window, select Simulation and then select Run Timing Simulation.
    ( Alternatively, you can you the button on the tool bar.)

Copy your directory from the E: drive to the I:drive or a flash drive. You'll use this project for future labs.

Demonstrate the circuit to the lab demonstrator.

Delete everything from the E: drive so your files don't get used by someone else later.

It is strongly recommended that you do not update to version 10.0 or higher of Altera's Quartus tools. Major changes have been made to the tools. Many LPM functions are gone, the simulator now only uses ModelSim with scripting for inputs, no GUI is available to setup inputs and it is not as student friendly as earlier versions. Any earlier simulation tutorials and projects will need to be completely redone. This will likely be fixed in a future edition of the textbook, but it will take time.Fortunately older versions (i.e., 9.1 SP2) are still available for download at Altera.The features added in 10.0 and higher are only critical if you have one of the newest FPGA chips, and they are not the ones used on the low cost education boards.
Here is the link for the Quartus 9.1 SP2 download: https://www.altera.com/download/dnl-index.jsp . This link keeps changing, but the old software is still around the website.

There is also a simulator add-on available for Quartus version 11.0 that works like the old Quartus simulator. It is available in the University program section at Altera's website. It runs as a standalone application program, and designs must be compiled first in Quartus and then can be run in the simulator.The current URL for the Quartus II Simulator add-on is http://www.altera.com/education/univ/software/qsim/unv-qsim.html

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On the DE2 board if you are using the LCD display core, the signal pinLCD_ON (Pin L4) needs to be tied high. This is done is several of the book'sexamples, but is not adequately explained in the text.

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